test2: file format elf64-x86-64 Disassembly of section .init: 0000000000401000 <_init>: 401000: f3 0f 1e fa endbr64 401004: 48 83 ec 08 sub $0x8,%rsp 401008: 48 8b 05 e9 2f 00 00 mov 0x2fe9(%rip),%rax # 403ff8 <__gmon_start__@Base> 40100f: 48 85 c0 test %rax,%rax 401012: 74 02 je 401016 <_init+0x16> 401014: ff d0 call *%rax 401016: 48 83 c4 08 add $0x8,%rsp 40101a: c3 ret Disassembly of section .plt: 0000000000401020 : 401020: ff 35 e2 2f 00 00 push 0x2fe2(%rip) # 404008 <_GLOBAL_OFFSET_TABLE_+0x8> 401026: ff 25 e4 2f 00 00 jmp *0x2fe4(%rip) # 404010 <_GLOBAL_OFFSET_TABLE_+0x10> 40102c: 0f 1f 40 00 nopl 0x0(%rax) 0000000000401030 : 401030: ff 25 e2 2f 00 00 jmp *0x2fe2(%rip) # 404018 401036: 68 00 00 00 00 push $0x0 40103b: e9 e0 ff ff ff jmp 401020 <_init+0x20> Disassembly of section .text: 0000000000401040 <_start>: 401040: f3 0f 1e fa endbr64 401044: 31 ed xor %ebp,%ebp 401046: 49 89 d1 mov %rdx,%r9 401049: 5e pop %rsi 40104a: 48 89 e2 mov %rsp,%rdx 40104d: 48 83 e4 f0 and $0xfffffffffffffff0,%rsp 401051: 50 push %rax 401052: 54 push %rsp 401053: 45 31 c0 xor %r8d,%r8d 401056: 31 c9 xor %ecx,%ecx 401058: 48 c7 c7 b9 11 40 00 mov $0x4011b9,%rdi 40105f: ff 15 8b 2f 00 00 call *0x2f8b(%rip) # 403ff0 <__libc_start_main@GLIBC_2.34> 401065: f4 hlt 401066: 66 2e 0f 1f 84 00 00 cs nopw 0x0(%rax,%rax,1) 40106d: 00 00 00 0000000000401070 <_dl_relocate_static_pie>: 401070: f3 0f 1e fa endbr64 401074: c3 ret 401075: 66 2e 0f 1f 84 00 00 cs nopw 0x0(%rax,%rax,1) 40107c: 00 00 00 40107f: 90 nop 0000000000401080 : 401080: b8 30 40 40 00 mov $0x404030,%eax 401085: 48 3d 30 40 40 00 cmp $0x404030,%rax 40108b: 74 13 je 4010a0 40108d: b8 00 00 00 00 mov $0x0,%eax 401092: 48 85 c0 test %rax,%rax 401095: 74 09 je 4010a0 401097: bf 30 40 40 00 mov $0x404030,%edi 40109c: ff e0 jmp *%rax 40109e: 66 90 xchg %ax,%ax 4010a0: c3 ret 4010a1: 66 66 2e 0f 1f 84 00 data16 cs nopw 0x0(%rax,%rax,1) 4010a8: 00 00 00 00 4010ac: 0f 1f 40 00 nopl 0x0(%rax) 00000000004010b0 : 4010b0: be 30 40 40 00 mov $0x404030,%esi 4010b5: 48 81 ee 30 40 40 00 sub $0x404030,%rsi 4010bc: 48 89 f0 mov %rsi,%rax 4010bf: 48 c1 ee 3f shr $0x3f,%rsi 4010c3: 48 c1 f8 03 sar $0x3,%rax 4010c7: 48 01 c6 add %rax,%rsi 4010ca: 48 d1 fe sar %rsi 4010cd: 74 11 je 4010e0 4010cf: b8 00 00 00 00 mov $0x0,%eax 4010d4: 48 85 c0 test %rax,%rax 4010d7: 74 07 je 4010e0 4010d9: bf 30 40 40 00 mov $0x404030,%edi 4010de: ff e0 jmp *%rax 4010e0: c3 ret 4010e1: 66 66 2e 0f 1f 84 00 data16 cs nopw 0x0(%rax,%rax,1) 4010e8: 00 00 00 00 4010ec: 0f 1f 40 00 nopl 0x0(%rax) 00000000004010f0 <__do_global_dtors_aux>: 4010f0: f3 0f 1e fa endbr64 4010f4: 80 3d 35 2f 00 00 00 cmpb $0x0,0x2f35(%rip) # 404030 <__TMC_END__> 4010fb: 75 13 jne 401110 <__do_global_dtors_aux+0x20> 4010fd: 55 push %rbp 4010fe: 48 89 e5 mov %rsp,%rbp 401101: e8 7a ff ff ff call 401080 401106: c6 05 23 2f 00 00 01 movb $0x1,0x2f23(%rip) # 404030 <__TMC_END__> 40110d: 5d pop %rbp 40110e: c3 ret 40110f: 90 nop 401110: c3 ret 401111: 66 66 2e 0f 1f 84 00 data16 cs nopw 0x0(%rax,%rax,1) 401118: 00 00 00 00 40111c: 0f 1f 40 00 nopl 0x0(%rax) 0000000000401120 : 401120: f3 0f 1e fa endbr64 401124: eb 8a jmp 4010b0 0000000000401126 : 401126: f3 0f 1e fa endbr64 40112a: 48 83 ec 78 sub $0x78,%rsp 40112e: 48 b8 68 65 6c 6c 6f movabs $0x6f77206f6c6c6568,%rax 401135: 20 77 6f 401138: ba 72 6c 64 00 mov $0x646c72,%edx 40113d: 48 89 04 24 mov %rax,(%rsp) 401141: 48 89 54 24 08 mov %rdx,0x8(%rsp) 401146: 48 c7 44 24 10 00 00 movq $0x0,0x10(%rsp) 40114d: 00 00 40114f: 48 c7 44 24 18 00 00 movq $0x0,0x18(%rsp) 401156: 00 00 401158: 48 c7 44 24 20 00 00 movq $0x0,0x20(%rsp) 40115f: 00 00 401161: 48 c7 44 24 28 00 00 movq $0x0,0x28(%rsp) 401168: 00 00 40116a: 48 c7 44 24 30 00 00 movq $0x0,0x30(%rsp) 401171: 00 00 401173: 48 c7 44 24 38 00 00 movq $0x0,0x38(%rsp) 40117a: 00 00 40117c: 48 c7 44 24 40 00 00 movq $0x0,0x40(%rsp) 401183: 00 00 401185: 48 c7 44 24 48 00 00 movq $0x0,0x48(%rsp) 40118c: 00 00 40118e: 48 c7 44 24 50 00 00 movq $0x0,0x50(%rsp) 401195: 00 00 401197: 48 c7 44 24 58 00 00 movq $0x0,0x58(%rsp) 40119e: 00 00 4011a0: c7 44 24 60 00 00 00 movl $0x0,0x60(%rsp) 4011a7: 00 4011a8: 48 89 e0 mov %rsp,%rax 4011ab: 48 89 c7 mov %rax,%rdi 4011ae: e8 7d fe ff ff call 401030 4011b3: 90 nop 4011b4: 48 83 c4 78 add $0x78,%rsp 4011b8: c3 ret 00000000004011b9
: 4011b9: f3 0f 1e fa endbr64 4011bd: 48 83 ec 08 sub $0x8,%rsp 4011c1: b8 00 00 00 00 mov $0x0,%eax 4011c6: e8 5b ff ff ff call 401126 4011cb: b8 00 00 00 00 mov $0x0,%eax 4011d0: 48 83 c4 08 add $0x8,%rsp 4011d4: c3 ret 4011d5: 66 2e 0f 1f 84 00 00 cs nopw 0x0(%rax,%rax,1) 4011dc: 00 00 00 4011df: 90 nop 00000000004011e0 : 4011e0: 90 nop 4011e1: 90 nop 4011e2: 90 nop 4011e3: 90 nop 4011e4: 90 nop 4011e5: 90 nop 4011e6: 90 nop 4011e7: 90 nop 4011e8: 90 nop 4011e9: 90 nop 4011ea: 90 nop 4011eb: 90 nop 4011ec: 90 nop 4011ed: 90 nop 4011ee: 90 nop 4011ef: 90 nop 4011f0: 90 nop 4011f1: 90 nop 4011f2: 90 nop 4011f3: 90 nop 4011f4: 90 nop 4011f5: 90 nop 4011f6: 90 nop 4011f7: 90 nop 4011f8: 90 nop 4011f9: 90 nop 4011fa: 90 nop 4011fb: 90 nop 4011fc: 90 nop 4011fd: 90 nop 4011fe: 90 nop 4011ff: 90 nop 401200: 90 nop 401201: 90 nop 401202: 90 nop 401203: 90 nop 401204: 90 nop 401205: 90 nop 401206: 90 nop 401207: 90 nop 401208: 90 nop 401209: 90 nop 40120a: 90 nop 40120b: 90 nop 40120c: 90 nop 40120d: 90 nop 40120e: 90 nop 40120f: 90 nop 401210: 90 nop 401211: 90 nop 401212: 90 nop 401213: 90 nop 401214: 90 nop 401215: 90 nop 401216: 90 nop 401217: 90 nop 401218: 90 nop 401219: 90 nop 40121a: 90 nop 40121b: 90 nop 40121c: 90 nop 40121d: 90 nop 40121e: 90 nop 40121f: 90 nop 401220: 90 nop 401221: 90 nop 401222: 90 nop 401223: 90 nop 401224: 90 nop 401225: 90 nop 401226: 90 nop 401227: 90 nop 401228: 90 nop 401229: 90 nop 40122a: 90 nop 40122b: 90 nop 40122c: 90 nop 40122d: 90 nop 40122e: 90 nop 40122f: 90 nop 401230: 90 nop 401231: 90 nop 401232: 90 nop 401233: 90 nop 401234: 90 nop 401235: 90 nop 401236: 90 nop 401237: 90 nop 401238: 90 nop 401239: 90 nop Disassembly of section .fini: 000000000040123c <_fini>: 40123c: f3 0f 1e fa endbr64 401240: 48 83 ec 08 sub $0x8,%rsp 401244: 48 83 c4 08 add $0x8,%rsp 401248: c3 ret